- What are the four steps CPUs use to execute instructions?
- In Fig. 4-6, the B bus register is encoded in a 4-bit field, but the C bus is represented as a bit map. Why?
- In Fig. 4-6 there is a box labeled ‘‘High bit.’’ Give a circuit diagram for it.
- When the JMPC field in a microinstruction is enabled, MBR is ORed with NEXT AD- DRESS to form the address of the next microinstruction. Are there any circumstances in which it makes sense to have NEXT ADDRESS be 0x1FF and use JMPC?
- Suppose that in the example of Fig. 4-14(a) the statement k = 5; is added after the if statement. What would the new assembly code be? Assume that the compiler is an optimizing compiler.
- Give two different IJVM translations for the following Java statement: i = k + n + 5;
- Give the Java statement that produced the following IJVM code:
ILOAD j
ILOAD n
ISUB
BIPUSH 7
ISUB
DUP
IADD
ISTORE i
