Time: Mondays 5:00-6:00pm. Zoom Meeting
Description
A study of sequential and combinational logic, computer system components, hardwired and micro-programmed control units, memory organization, and RISC architecture. The course includes a major project in designing and implementing a microprogrammed computer using a logic simulator.
Text
Andrew S. Tanenbaum, Structured Computer Organization (6th Edition), Prentice Hall, 2012
References, Documents, Links
- Syllabus
- The Computer History Museum
- A simple computer
- The Mic-1
- Download LogiSim (You must have Java installed to use)
- CPU Demos
- Computer Architecture Simulation & Visualization
- Simulation of a processor in Java
- A history of processors
- FreeBSD Notes
Homework Assignments
- History Assignment
- Current Processors
- Homework 3
- Homework 4
- Homework 5
- Homework 6
- Homework 7
- Homework 8
- Homework 9, (Appendix A)
- Homework 10, (Appendix B)
- Homework 11
- Homework 12
- Homework 13
- Homework 14
Lab Assignments
- Lab 1 – A simple computer.
- Lab 2 – Programming the MIC-1.
- Lab 3 – Logisim Introduction.
- Lab 4 – Logisim Sub-circuits, Bundles, Debugging.
- Lab 5 – Build a 12-bit ALU.
- Lab 6 – Memory, Buses, and manual ALU operations.
- Lab 7 – Basic Microcode control.
- Lab 8 – Microcode with branching.
- Lab 9 – Instruction decoding.
- Lab 10 – A basic microprogrammed computer.
- Lab 11 – A complete microprogrammed computer.
- Lab 12 – Programming our microcoded computer in machine code.
- Lab 13 – Presentation of processor enhancements.
cs.kenyon.edu/index.php/scmp-391-lab-12/(opens in a new tab)
Videos
Course Slides
Chapter04-TheMicroarchitectureLevel.ppt(opens in a new tab)
Chapter04-TheMicroarchitectureLevel.ppt(opens in a new tab)
- Chapter 1 Slides
- Chapter 2 Slides
- Chapter 3 Slides
- Chapter 4 Slides
- Chapter 5 Slides
- Chapter 6 Slides
- Chapter 8 Slides
Schedule
| Week | Topic | Reading | Assignments Due |
| Feb 1 | Introduction | Ch 1 | HW 1 – History Write Up |
| Feb 8 | A Simple Computer | Lab 1 | |
| Feb 15 | Computer Systems Organization | Ch 2 | HW 2 – Current Processors Homework, HW 3 |
| Feb 22 | Programming the MIC-1 | Ch 2 | HW 3 |
| Mar 1 | Digital Logic Level – Gates & Logic, Basic Logic Circuits Logisim Introduction | Ch 3.1-3.3 | Lab 2, HW 4 |
| Mar 8 | Digital Logic Level – Memory, CPU Chips and Buses | Ch 3.4-3.6 | Lab 3, HW 5 |
| Mar 15 | Digital Logic Level – Memory, CPU Chips and Buses | Ch 3.4-3.6 | Lab 4, HW 6, HW 7 |
| Mar 22 | The Microarchitecture Level – Microinstructions | Ch 4.1-4.2 | Lab 5, HW 8 |
| Mar 29 | The Microarchitecture Level – Example | Ch 4.3 | Lab 6 |
| Apr 5 | Binary and Floating Numbers | Ch A, B | Lab 7, HW 9, HW 10 |
| Apr 12 | The Microarchitecture Level – Performance, data path, cache memory | Ch 4.4-4.5 | Lab 8, HW 11 |
| Apr 19 | Virtual Memory | Ch 6 | Lab 9, HW 12 |
| Apr 26 | On-chip parallelism | Ch 8 | Lab 10, HW 13 |
| May 3 | Complete work | Lab 11, HW 14 | |
| May 10 | Complete work | Lab 12, Lab 13 | |
| May 17 2:00-3:30 | Final presentation of lab, each students presents for 30 minutes. |
