SCMP 493.00 Computer Organization and Structure S21

Time: Mondays 5:00-6:00pm. Zoom Meeting

Description

A study of sequential and combinational logic, computer system components, hardwired and micro-programmed control units, memory organization, and RISC architecture. The course includes a major project in designing and implementing a microprogrammed computer using a logic simulator.

Text

Andrew S. Tanenbaum, Structured Computer Organization (6th Edition), Prentice Hall, 2012

References, Documents, Links

Homework Assignments

  1. History Assignment
  2. Current Processors
  3. Homework 3
  4. Homework 4
  5. Homework 5
  6. Homework 6
  7. Homework 7
  8. Homework 8
  9. Homework 9, (Appendix A)
  10. Homework 10, (Appendix B)
  11. Homework 11
  12. Homework 12
  13. Homework 13
  14. Homework 14

Lab Assignments

  1. Lab 1 – A simple computer.
  2. Lab 2 – Programming the MIC-1.
  3. Lab 3 – Logisim Introduction.
  4. Lab 4 – Logisim Sub-circuits, Bundles, Debugging.
  5. Lab 5 – Build a 12-bit ALU.
  6. Lab 6 – Memory, Buses, and manual ALU operations.
  7. Lab 7 – Basic Microcode control.
  8. Lab 8 – Microcode with branching.
  9. Lab 9 – Instruction decoding.
  10. Lab 10 – A basic microprogrammed computer.
  11. Lab 11 – A complete microprogrammed computer.
  12. Lab 12 – Programming our microcoded computer in machine code.
  13. Lab 13 – Presentation of processor enhancements.

cs.kenyon.edu/index.php/scmp-391-lab-12/(opens in a new tab)

Videos

  1. Making of Intel Core i7
  2. How Hard Drives Work
  3. SSDs
  4. How Flash Works

Course Slides

Chapter04-TheMicroarchitectureLevel.ppt(opens in a new tab)

Chapter04-TheMicroarchitectureLevel.ppt(opens in a new tab)

  1. Chapter 1 Slides
  2. Chapter 2 Slides
  3. Chapter 3 Slides
  4. Chapter 4 Slides
  5. Chapter 5 Slides
  6. Chapter 6 Slides
  7. Chapter 8 Slides

Schedule

WeekTopicReadingAssignments Due
Feb 1IntroductionCh 1HW 1 – History Write Up
Feb 8A Simple ComputerLab 1
Feb 15Computer Systems OrganizationCh 2HW 2 – Current Processors Homework, HW 3
Feb 22Programming the MIC-1Ch 2HW 3
Mar 1Digital Logic Level – Gates & Logic, Basic Logic Circuits
Logisim Introduction
Ch 3.1-3.3Lab 2, HW 4
Mar 8Digital Logic Level – Memory, CPU Chips and BusesCh 3.4-3.6Lab 3, HW 5
Mar 15Digital Logic Level – Memory, CPU Chips and BusesCh 3.4-3.6Lab 4, HW 6, HW 7
Mar 22The Microarchitecture Level – MicroinstructionsCh 4.1-4.2Lab 5, HW 8
Mar 29The Microarchitecture Level – ExampleCh 4.3Lab 6
Apr 5Binary and Floating NumbersCh A, BLab 7, HW 9, HW 10
Apr 12The Microarchitecture Level – Performance, data path, cache memoryCh 4.4-4.5Lab 8, HW 11
Apr 19Virtual MemoryCh 6Lab 9, HW 12
Apr 26On-chip parallelismCh 8Lab 10, HW 13
May 3Complete workLab 11, HW 14
May 10Complete workLab 12, Lab 13
May 17
2:00-3:30
Final presentation of lab, each students presents for 30 minutes.

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